In devices that utilize variable code rate error correction coding, such as low-density parity-check (LDPC) error correction coding, separate parity check and/or generator matrices may be required for providing each of the different code rates. Thus, a device implementing variable code rates may locally store multiple different parity check and/or generator matrices. Accordingly, in order to add additional code rates, additional parity check and/or generator matrices may need to be stored on the device and/or existing parity check and/or generator matrices may be modified, such as by removing one or more rows and/or one or more columns. However, it may be difficult to add additional parity check and/or generator matrices to existing devices and modifying existing parity check and/or generator matrices may have suboptimal results, e.g. by introducing short cycles.